* Cantinho Satkeys

Refresh History
  • FELISCUNHA: Votos de um santo domingo para todo o auditório  4tj97u<z
    03 de Novembro de 2024, 10:49
  • j.s.: bom fim de semana  43e5r6 49E09B4F
    02 de Novembro de 2024, 08:37
  • j.s.: ghyt74 a todos  4tj97u<z
    02 de Novembro de 2024, 08:36
  • FELISCUNHA: ghyt74   49E09B4F  e bom feriado   4tj97u<z
    01 de Novembro de 2024, 10:39
  • JPratas: try65hytr Pessoal  h7ft6l k7y8j0
    01 de Novembro de 2024, 03:51
  • j.s.: try65hytr a todos  4tj97u<z
    30 de Outubro de 2024, 21:00
  • JPratas: dgtgtr Pessoal  4tj97u<z k7y8j0
    28 de Outubro de 2024, 17:35
  • FELISCUNHA: Votos de um santo domingo para todo o auditório  k8h9m
    27 de Outubro de 2024, 11:21
  • j.s.: bom fim de semana   49E09B4F 49E09B4F
    26 de Outubro de 2024, 17:06
  • j.s.: dgtgtr a todos  4tj97u<z
    26 de Outubro de 2024, 17:06
  • FELISCUNHA: ghyt74   49E09B4F  e bom fim de semana
    26 de Outubro de 2024, 11:49
  • JPratas: try65hytr Pessoal  101yd91 k7y8j0
    25 de Outubro de 2024, 03:53
  • JPratas: dgtgtr A Todos  4tj97u<z 2dgh8i k7y8j0
    23 de Outubro de 2024, 16:31
  • FELISCUNHA: ghyt74  pessoal   49E09B4F
    23 de Outubro de 2024, 10:59
  • j.s.: dgtgtr a todos  4tj97u<z
    22 de Outubro de 2024, 18:16
  • j.s.: dgtgtr a todos  4tj97u<z
    20 de Outubro de 2024, 15:04
  • FELISCUNHA: Votos de um santo domingo para todo o auditório  101041
    20 de Outubro de 2024, 11:37
  • axlpoa: hi
    19 de Outubro de 2024, 22:24
  • FELISCUNHA: ghyt74   49E09B4F  e bom fim de semana  4tj97u<z
    19 de Outubro de 2024, 11:31
  • j.s.: ghyt74 a todos  4tj97u<z
    18 de Outubro de 2024, 09:33

Autor Tópico: Phase Lock Loop System Design Theory and Principles RAHRF469  (Lida 48 vezes)

0 Membros e 1 Visitante estão a ver este tópico.

Online mitsumi

  • Moderador Global
  • ***
  • Mensagens: 115748
  • Karma: +0/-0
MP4 | Video: h264, 1280x720 | Audio: AAC, 48000 Hz
Language: English | Size: 1.73 GB | Duration: 6h 10m

What you'll learn
A complete system overview of Phase Lock Loop Topic
Requirements
RAHRF152 Modulation for Communication systems
RAHRF101 RF Basic Concepts and Components
Circuit theory
or have taken similar courses on the topics above
Description
This course focuses on phase locked loops (PLL) theory and behavioral modeling. PLLs are one of the most important blocks in RF communication transceiver systems. PLL systems exist in variety of high frequency applications, from simple clock circuits, to local oscillators (LOs) for high performance radio communication links, and ultra-fast switching frequency synthesizers in vector network analyzers (VNA). This course explains different types of PLLs with detailed explanations on individual sub-blocks. It includes PLL design and calculations with lots of examples and homework. There are also system level simulations and behavioral design using Advanced Design System (ADS) software. Phase noise of PLL is discussed in this course using equations, systems analysis, and there are tutorials that guide you to simulate the behavioral phase noise model of PLL and observe the system impact on VCO phase noise. There are also discussion about fractional PLL concept and features in this course.

It is important to remind you that this course covers the behavioral analysis of PLL sub-blocks however, it does not include any transistor level simulation and this topic will be covered on different course which will be released by Rahsoft in the future.

Prerequisites and topics you need to be familiar with for this course are:

Electronics and analog circuit design (intermediate level)

Control Theory (basic level)

ADS software

Concepts such as:

open and closed Loop gain

Open loop - close loop systems

Feedback

Transfer function

Phase margin

CMOS transistor

Basic op amp

Laplace transform

Please be advised that this course contains more math than previous courses.

PLL system design requires an understanding of transfer function derivations and stability analysis which needs system calculations and involves university level mathematical calculations.

Who this course is for:
Electrical Engineers
Communication Engineers
RF Engineers
Communication Enthusiasts

Screenshots


Download link:
Só visivel para registados e com resposta ao tópico.

Only visible to registered and with a reply to the topic.

Links are Interchangeable - No Password - Single Extraction