* Cantinho Satkeys

Refresh History
  • j.s.: try65hytr a todos
    Hoje às 19:11
  • FELISCUNHA: Votos de um santo domingo para todo o auditório  101041
    02 de Novembro de 2025, 11:58
  • j.s.: tenham um excelente domingo  49E09B4F
    02 de Novembro de 2025, 11:27
  • j.s.: ghyt74 a todos  4tj97u<z
    02 de Novembro de 2025, 11:26
  • FELISCUNHA: ghyt74   49E09B4F  e bom fim de semana  4tj97u<z
    01 de Novembro de 2025, 11:04
  • JPratas: try65hytr Pessoal  2dgh8i classic k7y8j0 yu7gh8
    31 de Outubro de 2025, 04:19
  • j.s.: try65hytr a todos  4tj97u<z
    30 de Outubro de 2025, 18:51
  • FELISCUNHA: ghyt74  pessoal  49E09B4F
    30 de Outubro de 2025, 11:38
  • haruri: Delta
    29 de Outubro de 2025, 07:54
  • FELISCUNHA: ghyt74   49E09B4F  e bom fim de semana  4tj97u<z
    25 de Outubro de 2025, 12:03
  • JPratas: try65hytr Pessoal  2dgh8i k7y8j0 yu7gh8
    24 de Outubro de 2025, 03:28
  • FELISCUNHA: Votos de um santo domingo para todo o auditório  4tj97u<z
    19 de Outubro de 2025, 11:16
  • j.s.: tenham um excelente domingo  43e5r6 49E09B4F
    19 de Outubro de 2025, 10:32
  • j.s.: ghyt74 a todos  4tj97u<z
    19 de Outubro de 2025, 10:32
  • FELISCUNHA: dgtgtr   49E09B4F  e bom fim de semana  4tj97u<z
    17 de Outubro de 2025, 12:08
  • JPratas: try65hytr Pessoal  4tj97u<z htg6454y k7y8j0
    17 de Outubro de 2025, 03:34
  • j.s.: dgtgtr a todos  4tj97u<z
    15 de Outubro de 2025, 15:12
  • FELISCUNHA: ghyt74  pessoal  49E09B4F
    15 de Outubro de 2025, 11:56
  • Radio TugaNet: boas tardes
    14 de Outubro de 2025, 13:14
  • FELISCUNHA: dgtgtr   49E09B4F  e bom fim de semana  4tj97u<z
    11 de Outubro de 2025, 12:06

Autor Tópico: Designing a Processor with VHDL and Xilinx Vivado  (Lida 119 vezes)

0 Membros e 1 Visitante estão a ver este tópico.

Online mitsumi

  • Sub-Administrador
  • ****
  • Mensagens: 126273
  • Karma: +0/-0
Designing a Processor with VHDL and Xilinx Vivado
« em: 30 de Maio de 2021, 15:39 »

MP4 | Video: h264, 1280x720 | Audio: AAC, 44.1 KHz, 2 Ch
Genre: eLearning | Language: English + srt | Duration: 57 lectures (5h 30m) | Size: 1.43 GB
Step by Step Guide from Scratch

What you'll learn:
Startegies to implement VHDL based CPU
Buliding Custom Intruction Set to meet resource utilizations
Strategies to add Program and Data Memory inside Processor
Strategies to add Jump and Branching Instructions inside Processor
Strategies to include Register, Direct and Immediate addressing modes to processor
Crafting your own processor from Scratch similar to Popular Intel 8051 architecture

Requirements
Fundamentals of Digital Electronics

Description
Most of the 21st-century applications require powerful hardware but also along with the centralized controller allowing the development of complex algorithms. As we enter into the AI or Cloud-based devices and as systems complexity is growing daily, the need for incorporating multiple processor instances becomes mandatory as we progress in the AI era. Zynq and Microblaze are two popular alternatives that exist in the market suitable for almost any application requirements. The requirements of using Multiple instances of Processor viz. Multiple instances of Microblaze soft processor or using a hard processor such as Zynq Processor along with single or multiple instances of Microblazer become necessary to independently handle both Data processing and control requirements. The fundamental challenge of incorporating multiple instances of Soft processors like Microblaze is the number of resources consumed for implementing Microblaze on the FPGA. Since FPGA consists of a limited amount of the FPGA resources, hardware and Software partition plays a prominent role in building complex systems. Another popular alternative approach followed by Embedded Engineers to build a Custom CPU / Processor with the only required functionality thereby saving a large amount of the resources as compared to adding Microblaze instance. The course will discuss all the fundamentals required to build a simple processor/ CPU with VHDL and strategies to test its functionality. After completing this course, you will understand all the necessary skills required to build Complex CPU architecture to meet requirements. Best wishes for crafting your own processor.

Who this course is for
Anyone Interested to build Custom CPU on FPGA for Load Sharing


Download link:
Só visivel para registados e com resposta ao tópico.

Only visible to registered and with a reply to the topic.

Links are Interchangeable - No Password - Single Extraction